Tensilica

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Tensilica, Inc. is the leader in customizable dataplane processor IP cores. Dataplane Processor Units (DPUs) combine the best capabilities of CPUs and DSPs while delivering 10 to100x the performance because they can be customized using Tensilica’s automated design tools to meet specific signal processing performance targets.  Tensilica’s industry leading HiFi Audio DSP core is supported by over 80 software packages including codecs and special effects software. Tensilica’s Baseband Engine is the most popular processor core DSP solution for LTE designs. Tensilica’s DPUs  power SOC designs at system OEMs and six out of the top 10 semiconductor companies for products including mobile phones, consumer electronics devices (including digital TV, Blu-ray Disc players, broadband set top boxes, digital still cameras and portable media players), computers, and storage, networking and communications equipment. Major customers include AMD, Atheros, Cisco, Epson, Fujitsu, Huawei,  Intel, LG Electronics, Marvell, NEC, NTT Docomo, Panasonic, and Samsung. For more information on Tensilica’s patented, benchmark-proven DPUs visit www.tensilica.com.

Software Porting to Tensilica-Based Multicore SOC Designs Now Aided by PolyCore Software's Poly-Platform

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BURLINGAME, CA and SANTA CLARA, CA--(December 22, 2011) - PolyCore Software, Inc. (PSI) and Tensilica®, Inc. today announced a partnership to make it easier and faster for developers to port their software to, or design software for, integrated circuits with multiple Tensilica dataplane processors (DPUs). PSI's Poly-Platform™ toolset now comprehends Tensilica's entire DPU family, which ranges from small footprint controllers to the industry's highest-performance DSP (digital signal processor) IP core, with many variations in between.

PSI's Poly-Platform facilitates seamless scalability from single core to multicore architectures, enabling designers to take full advantage of sophisticated compute engines, accelerators and custom configurations. Using a friendly GUI (graphical user interface), the topology can be diagrammed and defined as a map that helps streamline the process of building and running the application. This efficient process significantly cuts development time and lets developers optimize application performance. Several scenarios can be tested in a short period of time.

Chip designers increasingly use multiple Tensilica DPUs in their design, each DPU optimized for a particular function in the data path, such as audio, baseband DSP, security, image processing, or more. Tensilica's DPUs are easily optimized for these compute-intensive applications.

"PolyCore Software's Poly-Platform speeds the process of mapping application software to multiple Tensilica DPUs," stated Steve Roddy, Tensilica's vice president of marketing and business development. "Ideally, during the design the software and hardware teams can use tools like Poly-Platform with our own processor design tools to make the best hardware/software tradeoffs. But even after the chip is made, the software team can greatly benefit from using Poly-Platform for the most efficient mapping of their software to our cores."

"Many semiconductor companies and OEMs have incorporated one or multiple Tensilica DPUs in their SOCs," said Sven Brehmer, president and CEO, PolyCore Software. "Our software gives developers the freedom from programming directly to the hardware interfaces, allowing them to quickly deploy their code on the various IP cores in that chip."
 


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