Senior Logic Design/Verification Engineer
Sr. Design engineer for Lucid's ASIC team, responsible for:
•Logic design flow
•Chip integration: IO, power, clock, reset, and timing design and verification.
B.Sc in EE Engineering
MSC in EE Engineering – Advantage
•5+ years of experience as an ASIC/VLSI Engineer, performing Logic Design & Verification
•Strong experience in complex logic design and integrations.
•Strong experience and familiarity with modern verification methods, issues, and solutions.
•Definition and implementation of advanced verification environments
•ASIC timing closure flow including Prime Time-SI - Advantage
•Physical design experience - Advantage
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