Ronen Stilkol

Power, Noise and Reliability for Chip-Package-System Design Convergence

Written by Ronen Stilkol, Apache Design Solution Israel

ESD

ESD Robustness Verification for System-on-a-Chip Designs

Posted by: Ronen Stilkol in Technology on Jul 05, 2010

Tagged in: ESD

Given the complexity of present day’s System-on-chip (SoC) designs, higher resistance of the power and ground meshes, increased device density, and the greater sensitivity of the metal structures to breakdown in the sub micron technology nodes, the proper design and placement of ESD protection circuitry has become quite critical.