Sofics and Hardent Join Mixel’s MIPI® Ecosystem to Provide Designers a Complete MIPI Solution

SAN JOSE, Calif. - Mixel (www.mixel.com), a leading provider of mixed-signal IPs, today announced new partnerships with Sofics bvba (www.sofics.com), a leading provider of analog I/Os, specialty digital I/Os and ESD protection, and Hardent (www.hardent.com), a leading provider of video compression IP cores. Sofics and Hardent are the newest members of the Mixel MIPI ecosystem known as Mixel MIPI Central and each company’s IP will bring new product offerings to Mixel MIPI IP customers.

Mixel’s MIPI PHY supports multiple standards, including MIPI D-PHYSM, MIPI C-PHYSM, and M-PHY®, as well as dual-mode PHYs such as MIPI C-PHY/MIPI D-PHY combo and LVDS/MIPI D-PHY combo. These PHY IPs have been integrated by hundreds of customers all over the globe into thousands of products. IC designers have used the MIPI IP to build multimedia and chip-to-chip interfaces for lower-power applications such as mobile, IoT, wearables, and automotive.

Sofics’ Electrostatic Discharge (ESD) portfolio is silicon proven on 10 foundries including the most advanced FinFET processes. More than 100 fabless companies rely on Sofics on-chip ESD protection solutions to enable higher performance, higher robustness while reducing design time and cost of SoC design. Together with Mixel’s MIPI PHY IP, Sofics provides a complete and best-in-class MIPI solution protected with low-leakage ESD solutions in a small footprint.

Hardent’s VESA Display Stream Compression (DSC) and VESA Display Compression (VDC-M) encoder and decoder IP cores enable designers to use visually lossless, ultra-low-latency video compression to reduce the display bandwidth needed for creating cutting-edge displays with higher resolutions, faster refresh rates, and greater color depths. Hardent’s video compression IP cores can be used with the Mixel PHY IP and the Rambus MIPI DSI-2SM controller IP in applications such as mobile, AR/VR, and automotive.

Mixel has developed a deep relationship with its MIPI ecosystem partners spanning the complete spectrum of product development, to provide its potential MIPI customers with one stop shopping for MIPI product development. Sofics joins Mixel MIPI Central as the first IP provider of Analog I/Os, specialty digital I/Os, and ESD protection. Hardent joins as the only video compression IP provider. Combined with the existing MIPI Central members’ product portfolio, Sofics and Hardent round out the Mixel MIPI ecosystem with a more complete offering to customers interested in acquiring MIPI IP from Mixel.

“To ensure good signal integrity, the MIPI PHY interfaces need to be paired with analog I/Os with low parasitic capacitance. Moreover, products developed in advanced CMOS or FinFET nodes are very susceptible to ESD and thus require matching performance ESD protection clamps,” said Koen Verhaege, CEO of Sofics. “Sofics’ ESD solutions have 30% lower parasitic capacitance and 2 to 3 orders lower leakage compared with conventional concepts.”

“Hardent is pleased to begin this new partnership with Mixel as a member of the Mixel MIPI Central ecosystem,” says Alain Legault, VP IP Products at Hardent. “Mixel IP customers will benefit greatly from our unique expertise in video compression when it comes to designing their next generation display products. Our video compression IP cores are silicon proven and have been successfully implemented in a wide range of target applications.”

“It is clear that IC designers that integrate Mixel’s MIPI IP can benefit from close collaboration between design teams at Mixel, Sofics, and Hardent,” said Ashraf Takla, Mixel CEO and President. “For our customers targeting low-power, high-performance SerDes applications, combining the strengths of companies with best-in-class synergistic IP portfolios focused on MIPI is a clear win for the ecosystem.”