Don Dingee

Don Dingee

An industry survey some three years ago indicated only about one-quarter of all chip designers were using dynamic voltage and frequency scaling (DVFS). It’s likely most of those people who said they were implementing DVFS are deeply dependent upon a mobile operating system. For instance, Android offers a range of CPU governor software modules to optimize frequency and voltage levels for application throughput. While DVFS is already enabled in most hardened CPU and GPU cores, clusters and/or subsystems, the majority of SoC designers not tied to Android opt for simpler techniques like clock and power gating. Is there an opportunity for a more holistic DVFS approach that more SoC designers would embrace?