The Embedded FPGA Advantage to Designing Chips

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16 April 2017

All chip designers know that the deadline to “freeze RTL” comes all too soon. Now you don’t have to freeze the critical part of your RTL that needs to continue to change to keep up with evolving standards and changing customer requirements. Thanks to a handful of embedded FPGA companies, including Flex Logix who have introduced proven embedded FPGA platforms, chip designers can keep some of the chip flexible, enabling RTL to be updated any time, even in the customers’ systems.

In this article, we’ll talk about some of the key advantages to embedded FPGA, discuss how chip designers can use it, and also correct some of the most common misconceptions about what embedded FPGA is and isn’t.

 

First of all, embedded FPGA is not traditional FPGA such as those offered by Xilinx and Altera. The technology is very similar, except with an embedded FPGA there is no need for SERDES and PHYs because on-chip signaling is very fast. Density is also very similar, although some embedded FPGA platforms are much better than others so designers need to do their homework and shop around for the best platform. The real difference is the users. FPGA chips are used primarily by systems companies, with some in high volume. Embedded FPGAs are used primarily by chip companies who need to integrate a small amount of FPGA-like flexibility into their chips.

An FPGA combines an array of programmable/reconfigurable logic blocks in a programmable interconnect fabric. In an FPGA chip, the outer rim of the chip consists of a combination of GPIO, SERDES and specialized PHYs such as DDR3/4. In advanced FPGAs, the I/O ring is roughly 1/4 of the chip and the “fabric” is roughly 3/4 of the chip. The “fabric” itself is mostly interconnect in today’s FPGA chips where 20-25% of the fabric area is programmable logic and 75-80% is programmable interconnect.

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An embedded FPGA is an FPGA fabric without the surrounding ring of GPIO, SERDES, and PHYs. Instead, an embedded FPGA connects to the rest of the chip using standard digital signaling, enabling very wide, very fast on-chip interconnects.

How it can be used?

There are a wide range of applications ideal for embedded FPGA, from very large networking chips down to small MCU/IoT chips. In 40nm with applications such as MCU/IoT, the emphasis is on power so embedded FPGA companies optimize their products to have more power management modes, low voltage state retention and other features. In 28/16nm applications, the emphasis is on performance so embedded FPGA such as the Flex Logix EFLX is optimized for that. The highest performance requirement is typically where EFLX operates in the control path or data path and it needs to clock at the frequency of the surrounding hardwired RTL ASIC. In this case, customers typically are using ELFX in blocks of 1000 or less LUTs implanting fast control logic with 1 or 2 LUT stages between flops. I/O requirements tend to be very large especially on inputs. A relatively lower performance requirement is I/O control, such as in a MCU or IOT, where embedded FPGA can enable local processing of I/Os to reduce the overall system power by not having to activate the MPU or where it can implement additional serial I/O functions as needed. An intermediate application is where we are a block of reconfigurable RTL on a processor bus.

Build it and they will come

One key advantage of embedded FPGA is the ability to allow customers to design chips in whatever size or configurations array they require. For example, if a customer is designing in 16nm, they might only require a few hundred LUTs of programmable logic for fast reconfigurable control logic running at ~1GHz. In contrast, another customer in the same process may want 50K-100K LUTs for a datacenter processor accelerator. With Flex Logix the way that can be achieved is by using tileable building blocks. First, 4 EFLX IP cores are designed using the above approach. Each IP core is a stand-alone FPGA, but they can also be arrayed to offer EFLX arrays, about 75 in total, from 100 LUTs to 122.5K LUTs, with any mix of logic/DSP.

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Each EFLX IP core has an extra top-layer of interconnect which allows one core to connect automatically to surrounding neighbors to make a large array up to NxN.

EFLX-100 arrays up to 5x5 or 3,000 LUTs (there are actually 120 LUTs in an EFLX-100).

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EFLX-2.5K takes over at 2500 LUTs and arrays up to 122.5K LUTs.

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An array can be all-logic or all-DSP or any mix of the two types of cores:
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It is also possible to embed large amounts of RAM in the embedded array. Flex Logix does this by using standard RAM compilers to generate any kind of RAM that the customer requests (single port, dual port; ECC/parity/none; as much as wanted) and positions the RAM between the cores. The RAM is part of a single EFLX array.

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Using the above approach allows a few IP cores to generate an almost limitless variety of embedded FPGA arrays to suit any customer requirement.

The Advantages Don't Stop There

Chip designers are finding out that there are many advantages to using embedded FPGA and now that this technology has been proven in silicon and customers are designing chips based on it (see DARPA announced plans to use EFLX), the benefits are coming into light. Following are just a few of things designers can do with embedded FGPA that they could not do with standard FPGAs.

  • Interfaces to embedded FPGA on chip can be 64-bit, 128-bit, 256-bit, 512-bit and clock at on-chip data-rates. This enables bandwidth bottlenecks that might exist between an SoC and an FPGA chip to be broken when an FPGA is embedded on-chip. Also, the on-chip interface has very low latency (single-digit nanoseconds) whereas FPGA chips today use SERDES for high-bandwidth connections that have high latency (and high power).
  • FPGAs are often thought of as high power, largely because of the SERDES and PHYs involved in making an FPGA chip useful. When stripped of this overhead, the FPGA fabric itself can be very power efficient, especially when optimized in a process such as TSMC40ULP.
  • Embedded FPGAs as small as 100 LUTs are available so they can be used in multiple locations in a single chip.

Summary

Embedded FPGA is changing the way chips are designed and now that customers are signed up to take advantage of it, you can expect to see a flurry of other chip companies to follow suit. The cost and time savings are just so significant in scenarios where RTL has be updated during the chip design cycle. Companies really can’t afford to ‘not’ look at this new technology platform. In fact, from the looks of it, this technology is likely to follow the same trajectory path as ARM and other embedded IP companies who started out in the 90s and saw their technology become adopted so widely that today it is on almost every logic chip in the industry.

Last modified on Saturday, 23 September 2017 07:12
Geoff Tate

CEO of Flex Logix, Inc.

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