Senior Verification Engineer @ Inomize - 8-3-2020 Featured

08 March 2020
Location: Netanya and Jerusalem

Job Description:

This position includes hands on SOC verification tests development for full chip, cluster and block levels planning and implementation of verification environments using automated tools - mainly System Verilog.

Required Qualifications:

B.Sc. in Electrical Engineering from known university. 

Minimum 4 years of experience in soc verification.

Knowledge and experience in System Verilog or ‘e’ (Specman) language. 

Vast knowledge of verification flow (block level & full chip verification)

Familiarity with verification environments: VMM/OVM/UVM

Apply to This Job Here: Inomize website